What is an OTL coil in ladder logic?

OTL (Output Latch) is a retentive coil instruction. When the rung goes true, it sets the target bit to 1 and holds it there even after the rung goes false again. The bit stays set until an OTU (Output Unlatch) instruction clears it on a true rung somewhere else in the program.

What is the difference between OTL/OTU and a seal-in rung?

A seal-in rung uses the output coil's own contact in parallel with the start pushbutton to hold itself energised. Break the logic and the coil drops. OTL/OTU split the set and clear into separate rungs, and the bit stays set even if power is removed, because it lives in retentive memory.

Do OTL bits survive a PLC power cycle?

In Rockwell Logix controllers, OTL and OTU operate on standard BOOL tags by default. Standard tags reset to 0 on power-up. To survive a power cycle you must declare the tag as Retain in the tag properties. In Siemens S7 you would place the bit in a retentive DB or a retentive memory area.

Can two rungs write OTL and OTU to the same bit safely?

Yes, that is the intended pattern. One rung latches (OTL) and a separate rung unlatches (OTU). The scan resolves the last instruction executed. If both rungs are true in the same scan, the instruction physically lower in the program wins, so keep that in mind when ordering your rungs.

What happens if the OTU rung is missing from the program?

The bit will latch on and never clear, because nothing in the program issues the unlatch instruction. The only way to reset it is from the HMI, a programmer forcing the bit, or a power cycle (if the tag is non-retentive). Always write both OTL and OTU rungs before testing.

Are OTL and OTU the same as SET and RESET in other platforms?

Functionally yes. Siemens uses S (Set) and R (Reset) coils in LAD. CODESYS and IEC 61131-3 use SR and RS function blocks or S/R coils. Omron Sysmac uses SET and RSET. The behaviour is identical: a rising condition sets or clears a bit independently.

When should I use a seal-in rung instead of OTL/OTU?

Use a seal-in when you want the output to drop automatically on any logic break, such as a simple motor start/stop where losing the run condition should de-energise the output. Use OTL/OTU when the bit must persist after the triggering condition disappears, like a fault latch or an alarm that needs an explicit acknowledgment.

What is the Siemens equivalent of OTL in TIA Portal ladder?

In TIA Portal LAD the Set coil is labelled (S) and the Reset coil is labelled (R). They behave exactly like OTL and OTU. For retentive behaviour across power cycles you store the bit in a retentive DB or declare the memory address in the retentive memory range under PLC properties.

Can I use OTL on a physical output like a valve solenoid?

You can, but it is risky. If the PLC faults or power cycles, the physical output state depends on the output module's fail-safe configuration, but the retentive bit could re-energise the output on restart. Most engineers latch an internal BOOL and drive the physical output through a separate OTE rung guarded by safety conditions.

OTL and OTU Latch Coils in Ladder Logic Explained

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Flat vector ladder logic diagram showing OTL latch coil and OTU unlatch coil rungs with a shared retentive bit and memory icon

If you have ever tried to understand why a fault alarm stays on even after the fault clears, you have already bumped into a latching coil. The OTL and OTU instructions are simple, but the difference between them and a traditional seal-in rung trips up a surprising number of people, including experienced ones on their first Rockwell project.

What Is a Latching Coil in Ladder Logic?

A latching coil in ladder logic is a retentive output instruction that sets a bit to 1 when its rung goes true and holds that bit at 1 even after the rung goes false. A separate unlatch coil instruction clears the same bit when its own rung goes true. In Rockwell Studio 5000 and ControlLogix/CompactLogix these are the OTL (Output Latch) and OTU (Output Unlatch) instructions. The bit they control is shared between both rungs, and the two rungs can sit anywhere in the program. Neither instruction is self-resetting. That is the entire point.

OTL vs OTU: How the Pair Works Together

Think of OTL as a momentary button that flips a toggle switch on, and OTU as the button that flips it off. The switch stays in whatever position it was last put in, regardless of what the buttons are doing right now. The PLC scan cycle evaluates every rung every scan. If the OTL rung is false and the OTU rung is also false, the bit does not change. It just sits there, holding its state.

Understanding how the PLC scan cycle works step by step is important here. The scan executes top to bottom, left to right. If both the OTL rung and the OTU rung happen to be true in the same scan, the instruction that appears lower in the program wins. That is not a bug, but it will catch you out if you have not thought about rung order.

Rung order matters when OTL and OTU are both true simultaneously. The lower instruction in the program always wins. Put your OTU (unlatch) rung below the OTL rung if you want the clear to take priority in conflict. Put it above if you want the set to win.

Latching Coil vs Seal-In Rung: The Real Difference

A seal-in rung holds itself energised by adding the output's own XIC contact in parallel with the momentary start pushbutton. That is the classic start/stop motor circuit you will find in every beginner tutorial. The key property of a seal-in is that the output stays on only as long as the rung logic remains true. The moment the Stop button opens or a fault breaks the rung, the coil drops and the seal-in contact opens with it. Everything resets automatically.

An OTL/OTU pair is different in two ways. First, the set and clear are on completely separate rungs with independent conditions. Second, the bit does not care whether the OTL rung is currently true or false. It was set, so it stays set. You need an explicit OTU rung to clear it. This matters a lot for PLC internal bits, flags and coils used as fault latches, where the intent is exactly that: the fault stays registered until an operator acknowledges it.

Property	Seal-In Rung (OTE)	Latch/Unlatch (OTL/OTU)
How it holds state	Own contact in parallel with input	Bit retains last written value
Clears when...	Rung condition goes false	OTU rung goes true
Separate clear rung?	No	Yes, required
Typical use case	Motor run, valve enable	Fault latch, alarm, mode bit
Power-cycle behaviour	Clears (non-retentive OTE)	Clears unless tag is Retain

Key differences between a seal-in rung and an OTL/OTU latch pair

A Real Fault-Latch Example in Studio 5000

Here is a pattern I use constantly: a pressure switch on a hydraulic unit trips a fault latch. The latch stays active even after pressure recovers, forcing an operator to acknowledge it before the machine can restart. The OTL rung fires on the rising edge of the pressure fault to avoid re-latching every scan while the fault is present.

Hydraulic Pressure Fault Latch with Operator Acknowledge (Studio 5000)Ladder logic

Toggle inputs

Rung 0

Rung 1

Rung 2

Rung 3

Rung 4

Rung 5

energizedTip: click a contact in the diagram to flip its bit.

Rung 1: A one-shot (OSR) on the pressure fault signal latches the fault bit via OTL, so the latch fires once on fault onset rather than every scan. Rung 2: The OTU clears the latch only when the operator sends an HMI acknowledge AND the fault signal has already cleared, preventing an immediate re-latch. Rung 3: The latch bit drives an HMI alarm indicator. Rungs 4-5: The system can only start (OTL Sys_Running) when the fault latch is clear, and the stop command unlatches it. Rung 6: The physical pump output is driven by the running latch through a plain OTE.

Notice that the physical output (HydUnit_PumpOut) is driven by a plain OTE, not directly by an OTL. That is deliberate. Latching a physical output directly is risky because if the PLC restarts in a fault condition the bit could re-energise the actuator before your safety logic has a chance to evaluate. Keep latches on internal BOOLs and gate the physical output through a separate rung with safety conditions in series. This pairs well with what the emergency stop circuit wiring guide covers on the hardware side.

Retentive Memory: Does the Latch Survive a Power Cycle?

This is the question I get asked most often on Rockwell projects. In Studio 5000, OTL and OTU operate on standard BOOL tags by default. Standard tags are non-retentive, meaning they reset to 0 at power-up. If you want the latch to survive a controlled power cycle, you must tick the Retain checkbox in the tag's properties. The tag then lives in the retentive data area of the controller and will reload its last value on startup.

On Siemens S7-1200 and S7-1500, the equivalent approach is to store the latch bit in a retentive DB or to declare it in the retentive memory range under PLC properties. The S7-1200 Data Blocks guide explains retentive DB configuration in TIA Portal. In CODESYS you enable the RETAIN keyword on the variable declaration. The behaviour is consistent across platforms; the syntax just differs.

Field tip: For fault latches that should survive a planned power cycle (like an end-of-shift shutdown), mark the BOOL as Retain. For latches that should always reset on power-up (like a mode selection bit), leave it non-retentive. Getting this wrong leads to machines that restart in unexpected states and confuses everyone during the next shift.

The Missing OTU Trap and Other Common Mistakes

The most common mistake with OTL/OTU is writing the latch rung and forgetting to write the unlatch rung before testing. The bit turns on and nothing clears it. You end up forcing bits in the programmer, wondering why the logic is broken, and then realising the OTU rung is just missing. I have done it. Everyone has.

The second mistake is writing the OTU condition too broadly. If your OTU rung clears the fault latch the moment the fault signal disappears, you have effectively built a seal-in, not a latch. The operator never has a chance to see the alarm. Always require an explicit acknowledge input in series on the OTU rung, and use XIC vs XIO contacts correctly to guard the acknowledge. A typical pattern is: OTU fires only when (FaultAck is true) AND (fault input is already clear). That way acknowledging during an active fault does nothing, which is exactly what you want.

A third gotcha: if you use OTL on a BOOL that is also written by an OTE somewhere else in the program, the OTE will overwrite the OTL value on every scan where the OTE rung is evaluated. Never mix OTE and OTL/OTU on the same bit. Pick one mechanism and stick to it. This is covered in more detail in the normally open vs normally closed contacts breakdown when discussing coil conflicts.

Where Latching Coils Belong in a Real Program

Fault latches are the most obvious application, but OTL/OTU shows up in a few other places too:

Alarm management: latch an alarm bit on the rising edge of a fault, clear it only on acknowledge. See how this feeds into HMI alarm configuration for the display side.
Mode and state bits: latch a 'recipe loaded' or 'batch complete' bit that persists across scan cycles until the next stage of the sequence clears it.
Permissive interlock latches: latch a 'safety check passed' bit after a timed verification, so the machine does not have to re-run the check on every scan.
Step sequencers: some sequencer styles use a latched step bit per step rather than a counter, particularly when steps can be held for variable durations.
Communication fault indicators: latch a comms loss event so the operator sees it even if the connection briefly recovers. This is the exact pattern used in the EtherNet/IP communication loss diagnosis guide.

Siemens and CODESYS Equivalents at a Glance

The OTL/OTU naming is Rockwell-specific. Every platform has the same concept under different labels. In TIA Portal LAD (S7-1200, S7-1500) you will see (S) and (R) coils that work identically. In Structured Text in TIA Portal you would write FaultLatch := TRUE; and FaultLatch := FALSE; inside conditional IF blocks, which is functionally the same thing. CODESYS uses S and R coils in the LAD editor, or SR/RS function blocks. Omron Sysmac Studio uses SET and RSET instructions, as covered in the Omron Sysmac Studio getting-started guide. The logic pattern is universal.

Flat vector comparison of latching coil equivalents across Rockwell OTL/OTU, Siemens S/R, and CODESYS S/R ladder logic platforms — OTL/OTU (Rockwell), S/R (Siemens), and S/R (CODESYS) are the same concept with different labels

Troubleshooting a Latch That Will Not Clear

If an OTL bit is stuck on and the OTU rung looks correct, go online and check the actual rung status in the programmer. Look at each contact on the OTU rung individually. Nine times out of ten the fault input is still physically active (the fault has not cleared), or the acknowledge pushbutton wiring is not making contact. Online monitoring shows you which contact is holding the rung open without any guesswork.

If the rung shows all contacts true but the bit is still set, check whether another OTL rung is re-latching the bit in the same scan. Search all uses of the tag in your program. Studio 5000 lets you right-click the tag and select Cross Reference to find every rung that reads or writes it. Do that first. It is the fastest way to find a conflicting write.

For wiring-side issues (acknowledge button not registering, fault sensor stuck), the PLC digital input fault diagnosis guide and the multimeter I/O testing guide are the right next stops.

Keep Learning

Latching coils are one piece of the broader ladder logic picture. To see how they fit into a complete working program, the PLC bottle filling machine project walks through a full sequence that uses fault latches, timers, and counters together. For a deeper look at the contacts that drive latch rungs, XIC vs XIO: Ladder Logic Contacts Explained covers every case. And if you are preparing for an interview, Ladder Logic Interview Questions: Real Answers includes several OTL/OTU questions with the answers interviewers are actually looking for.