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3-Motor Start Sequence PLC Exercise: Ladder Logic

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Flat vector diagram showing a three-motor start sequence connected to a PLC output rack with timed interlock arrows and fault latch symbols

Sequential motor starting is one of the most common control tasks in industrial automation. Conveyors, crushing circuits, ventilation systems, and process lines all start motors in a fixed order to protect electrical infrastructure and mechanical drivetrains. Writing this sequence cleanly in ladder logic, with proper interlocks and fault handling, is a skill every PLC programmer needs to have locked down. This exercise builds it from scratch in Studio 5000, but the pattern transfers directly to any platform.

What Is a Motor Start Sequence in a PLC?

A motor start sequence is a PLC program that commands two or more motors to start in a defined order, with timed delays and run-confirm interlocks between each step. Motor 1 starts first. Once its run-confirm feedback bit goes high and a delay expires, motor 2 starts. The same pattern repeats for motor 3. If any motor fails to confirm within a timeout window, the sequence halts and a fault is raised. No subsequent motor starts until the fault is cleared.

Exercise Specification

Before writing a single rung, define what you are building. Skipping this step is what turns a 30-minute exercise into a two-hour debugging session. Here is the spec for this exercise:

  • Three motors: M1 (discharge conveyor), M2 (transfer conveyor), M3 (feed conveyor)
  • Start sequence: M1 first, then M2 after a 5-second delay, then M3 after another 5-second delay
  • Stop sequence: reverse order (M3 stops first, M2 stops 3 seconds later, M1 stops 3 seconds after M2)
  • Each motor has a run-confirm feedback input (contactor auxiliary contact)
  • If run-confirm does not arrive within 4 seconds of the output command, latch a fault and halt
  • An E-stop clears all outputs immediately with no sequenced stop
  • HMI provides Start, Stop, and individual fault-acknowledge bits
Start the sequence on the discharge end first (M1) and feed last (M3). That way, if you restart after a jam, there is already clearance downstream before material arrives. Getting the sequence direction right matters as much as getting the timers right.

I/O Tag List

Tag NameTypeDescription
HMI_StartCmdBOOL InputStart pushbutton from HMI or panel
HMI_StopCmdBOOL InputStop pushbutton from HMI or panel
Estop_ActiveBOOL InputE-stop chain open (NC logic, 1 = safe)
M1_RunFBBOOL InputMotor 1 contactor aux contact
M2_RunFBBOOL InputMotor 2 contactor aux contact
M3_RunFBBOOL InputMotor 3 contactor aux contact
M1_OutBOOL OutputMotor 1 contactor coil
M2_OutBOOL OutputMotor 2 contactor coil
M3_OutBOOL OutputMotor 3 contactor coil
Core I/O tags for the 3-motor sequence exercise (Studio 5000)

Internal tags you will also need: Seq_Running (BOOL), M1_FaultLatch, M2_FaultLatch, M3_FaultLatch (BOOL), M1_FaultAck, M2_FaultAck, M3_FaultAck (BOOL from HMI), and six TON timer tags: M1_StartTimeout, M2_StartDelay, M2_StartTimeout, M3_StartDelay, M3_StartTimeout, plus M2_StopDelay and M3_StopDelay for the reverse stop sequence. If you are new to timer instructions, the TON, TOF and TONR guide covers the exact instruction behaviour before you wire these up.

Building the Start Sequence Rungs

Rung 1: System Enable (Seq_Running)

The first rung latches the sequence active. A seal-in contact on Seq_Running holds it on after the momentary start button releases. The Stop command and any fault latch break the rung. This is the same pattern covered in the XIC vs XIO contact explanation, and it is the correct way to handle momentary pushbuttons.

3-Motor Timed Start Sequence with Run-Confirm Fault Latches (Studio 5000). Ladder logic (22 rungs): Rung 0: either examine if HMI_StartCmd is on (XIC), or examine if Seq_Running is on (XIC), then examine if HMI_StopCmd is off (XIO), then examine if Estop_Active is off (XIO), then examine if M1_FaultLatch is off (XIO), then examine if M2_FaultLatch is off (XIO), then examine if M3_FaultLatch is off (XIO), then latch output Seq_Running (OTL). Rung 1: examine if HMI_StopCmd is on (XIC), then unlatch output Seq_Running (OTU). Rung 2: examine if Seq_Running is on (XIC), then examine if M1_FaultLatch is off (XIO), then latch output M1_Out (OTL). Rung 3: examine if M1_Out is on (XIC), then examine if M1_RunFB is off (XIO), then TON on M1_StartTimeout. Rung 4: examine if M1_StartTimeout.DN is on (XIC), then examine if M1_RunFB is off (XIO), then examine if M1_Fault_OS is on (XIC), then latch output M1_FaultLatch (OTL). Rung 5: examine if M1_FaultLatch is on (XIC), then examine if M1_FaultAck is on (XIC), then examine if M1_Out is off (XIO), then unlatch output M1_FaultLatch (OTU). Rung 6: examine if M1_Out is on (XIC), then examine if M1_RunFB is on (XIC), then TON on M2_StartDelay. Rung 7: examine if M2_StartDelay.DN is on (XIC), then examine if M2_FaultLatch is off (XIO), then latch output M2_Out (OTL). Rung 8: examine if M2_Out is on (XIC), then examine if M2_RunFB is off (XIO), then TON on M2_StartTimeout. Rung 9: examine if M2_StartTimeout.DN is on (XIC), then examine if M2_RunFB is off (XIO), then examine if M2_Fault_OS is on (XIC), then latch output M2_FaultLatch (OTL). Rung 10: examine if M2_FaultLatch is on (XIC), then examine if M2_FaultAck is on (XIC), then examine if M2_Out is off (XIO), then unlatch output M2_FaultLatch (OTU). Rung 11: examine if M2_Out is on (XIC), then examine if M2_RunFB is on (XIC), then TON on M3_StartDelay. Rung 12: examine if M3_StartDelay.DN is on (XIC), then examine if M3_FaultLatch is off (XIO), then latch output M3_Out (OTL). Rung 13: examine if M3_Out is on (XIC), then examine if M3_RunFB is off (XIO), then TON on M3_StartTimeout. Rung 14: examine if M3_StartTimeout.DN is on (XIC), then examine if M3_RunFB is off (XIO), then examine if M3_Fault_OS is on (XIC), then latch output M3_FaultLatch (OTL). Rung 15: examine if M3_FaultLatch is on (XIC), then examine if M3_FaultAck is on (XIC), then examine if M3_Out is off (XIO), then unlatch output M3_FaultLatch (OTU). Rung 16: examine if HMI_StopCmd is on (XIC), then unlatch output M3_Out (OTU). Rung 17: examine if HMI_StopCmd is on (XIC), then TON on M2_StopDelay. Rung 18: examine if M2_StopDelay.DN is on (XIC), then unlatch output M2_Out (OTU). Rung 19: examine if M2_StopDelay.DN is on (XIC), then TON on M3_StopDelay. Rung 20: examine if M3_StopDelay.DN is on (XIC), then unlatch output M1_Out (OTU). Rung 21: examine if Estop_Active is off (XIO), then unlatch output M1_Out (OTU), then either unlatch output M2_Out (OTU), then either unlatch output M3_Out (OTU). Full 3-motor timed start sequence. M1 starts immediately on Seq_Running. M2 starts 5 s after M1 run-confirm. M3 starts 5 s after M2 run-confirm. Each motor has a 4 s run-confirm timeout that latches a fault and halts the sequence. Stop command reverses order: M3 off first, M2 off after 3 s, M1 off after another 3 s. E-stop clears all outputs instantly.

3-Motor Timed Start Sequence with Run-Confirm Fault Latches (Studio 5000)Ladder logic
Toggle inputs
Rung 0
Ladder logic rung: either examine if HMI_StartCmd is on (XIC), or examine if Seq_Running is on (XIC), then examine if HMI_StopCmd is off (XIO), then examine if Estop_Active is off (XIO), then examine if M1_FaultLatch is off (XIO), then examine if M2_FaultLatch is off (XIO), then examine if M3_FaultLatch is off (XIO), then latch output Seq_Running (OTL) either examine if HMI_StartCmd is on (XIC), or examine if Seq_Running is on (XIC), then examine if HMI_StopCmd is off (XIO), then examine if Estop_Active is off (XIO), then examine if M1_FaultLatch is off (XIO), then examine if M2_FaultLatch is off (XIO), then examine if M3_FaultLatch is off (XIO), then latch output Seq_Running (OTL) XIC HMI_StartCmd HMI_StartCmd HMI_StartCmd XIC Seq_Running Seq_Running Seq_Running XIO HMI_StopCmd HMI_StopCmd HMI_StopCmd XIO Estop_Active Estop_Active Estop_Active XIO M1_FaultLatch M1_FaultLatch M1_FaultLatch XIO M2_FaultLatch M2_FaultLatch M2_FaultLatch XIO M3_FaultLatch M3_FaultLatch M3_FaultLatch OTL Seq_Running Seq_Running Seq_Running L
Rung 1
Ladder logic rung: examine if HMI_StopCmd is on (XIC), then unlatch output Seq_Running (OTU) examine if HMI_StopCmd is on (XIC), then unlatch output Seq_Running (OTU) XIC HMI_StopCmd HMI_StopCmd HMI_StopCmd OTU Seq_Running Seq_Running Seq_Running U
Rung 2
Ladder logic rung: examine if Seq_Running is on (XIC), then examine if M1_FaultLatch is off (XIO), then latch output M1_Out (OTL) examine if Seq_Running is on (XIC), then examine if M1_FaultLatch is off (XIO), then latch output M1_Out (OTL) XIC Seq_Running Seq_Running Seq_Running XIO M1_FaultLatch M1_FaultLatch M1_FaultLatch OTL M1_Out M1_Out M1_Out L
Rung 3
Ladder logic rung: examine if M1_Out is on (XIC), then examine if M1_RunFB is off (XIO), then TON on M1_StartTimeout examine if M1_Out is on (XIC), then examine if M1_RunFB is off (XIO), then TON on M1_StartTimeout XIC M1_Out M1_Out M1_Out XIO M1_RunFB M1_RunFB M1_RunFB TON M1_StartTimeout T#4s 0 TONTimerM1_StartTimeoutM1_StartTimeoutPresetT#4sT#4sAccum00
Rung 4
Ladder logic rung: examine if M1_StartTimeout.DN is on (XIC), then examine if M1_RunFB is off (XIO), then examine if M1_Fault_OS is on (XIC), then latch output M1_FaultLatch (OTL) examine if M1_StartTimeout.DN is on (XIC), then examine if M1_RunFB is off (XIO), then examine if M1_Fault_OS is on (XIC), then latch output M1_FaultLatch (OTL) XIC M1_StartTimeout.DN M1_StartTimeout.DN M1_StartTimeout.DN XIO M1_RunFB M1_RunFB M1_RunFB OSR M1_Fault_OS M1_Fault_OS M1_Fault_OS OSR OTL M1_FaultLatch M1_FaultLatch M1_FaultLatch L
Rung 5
Ladder logic rung: examine if M1_FaultLatch is on (XIC), then examine if M1_FaultAck is on (XIC), then examine if M1_Out is off (XIO), then unlatch output M1_FaultLatch (OTU) examine if M1_FaultLatch is on (XIC), then examine if M1_FaultAck is on (XIC), then examine if M1_Out is off (XIO), then unlatch output M1_FaultLatch (OTU) XIC M1_FaultLatch M1_FaultLatch M1_FaultLatch XIC M1_FaultAck M1_FaultAck M1_FaultAck XIO M1_Out M1_Out M1_Out OTU M1_FaultLatch M1_FaultLatch M1_FaultLatch U
Rung 6
Ladder logic rung: examine if M1_Out is on (XIC), then examine if M1_RunFB is on (XIC), then TON on M2_StartDelay examine if M1_Out is on (XIC), then examine if M1_RunFB is on (XIC), then TON on M2_StartDelay XIC M1_Out M1_Out M1_Out XIC M1_RunFB M1_RunFB M1_RunFB TON M2_StartDelay T#5s 0 TONTimerM2_StartDelayM2_StartDelayPresetT#5sT#5sAccum00
Rung 7
Ladder logic rung: examine if M2_StartDelay.DN is on (XIC), then examine if M2_FaultLatch is off (XIO), then latch output M2_Out (OTL) examine if M2_StartDelay.DN is on (XIC), then examine if M2_FaultLatch is off (XIO), then latch output M2_Out (OTL) XIC M2_StartDelay.DN M2_StartDelay.DN M2_StartDelay.DN XIO M2_FaultLatch M2_FaultLatch M2_FaultLatch OTL M2_Out M2_Out M2_Out L
Rung 8
Ladder logic rung: examine if M2_Out is on (XIC), then examine if M2_RunFB is off (XIO), then TON on M2_StartTimeout examine if M2_Out is on (XIC), then examine if M2_RunFB is off (XIO), then TON on M2_StartTimeout XIC M2_Out M2_Out M2_Out XIO M2_RunFB M2_RunFB M2_RunFB TON M2_StartTimeout T#4s 0 TONTimerM2_StartTimeoutM2_StartTimeoutPresetT#4sT#4sAccum00
Rung 9
Ladder logic rung: examine if M2_StartTimeout.DN is on (XIC), then examine if M2_RunFB is off (XIO), then examine if M2_Fault_OS is on (XIC), then latch output M2_FaultLatch (OTL) examine if M2_StartTimeout.DN is on (XIC), then examine if M2_RunFB is off (XIO), then examine if M2_Fault_OS is on (XIC), then latch output M2_FaultLatch (OTL) XIC M2_StartTimeout.DN M2_StartTimeout.DN M2_StartTimeout.DN XIO M2_RunFB M2_RunFB M2_RunFB OSR M2_Fault_OS M2_Fault_OS M2_Fault_OS OSR OTL M2_FaultLatch M2_FaultLatch M2_FaultLatch L
Rung 10
Ladder logic rung: examine if M2_FaultLatch is on (XIC), then examine if M2_FaultAck is on (XIC), then examine if M2_Out is off (XIO), then unlatch output M2_FaultLatch (OTU) examine if M2_FaultLatch is on (XIC), then examine if M2_FaultAck is on (XIC), then examine if M2_Out is off (XIO), then unlatch output M2_FaultLatch (OTU) XIC M2_FaultLatch M2_FaultLatch M2_FaultLatch XIC M2_FaultAck M2_FaultAck M2_FaultAck XIO M2_Out M2_Out M2_Out OTU M2_FaultLatch M2_FaultLatch M2_FaultLatch U
Rung 11
Ladder logic rung: examine if M2_Out is on (XIC), then examine if M2_RunFB is on (XIC), then TON on M3_StartDelay examine if M2_Out is on (XIC), then examine if M2_RunFB is on (XIC), then TON on M3_StartDelay XIC M2_Out M2_Out M2_Out XIC M2_RunFB M2_RunFB M2_RunFB TON M3_StartDelay T#5s 0 TONTimerM3_StartDelayM3_StartDelayPresetT#5sT#5sAccum00
Rung 12
Ladder logic rung: examine if M3_StartDelay.DN is on (XIC), then examine if M3_FaultLatch is off (XIO), then latch output M3_Out (OTL) examine if M3_StartDelay.DN is on (XIC), then examine if M3_FaultLatch is off (XIO), then latch output M3_Out (OTL) XIC M3_StartDelay.DN M3_StartDelay.DN M3_StartDelay.DN XIO M3_FaultLatch M3_FaultLatch M3_FaultLatch OTL M3_Out M3_Out M3_Out L
Rung 13
Ladder logic rung: examine if M3_Out is on (XIC), then examine if M3_RunFB is off (XIO), then TON on M3_StartTimeout examine if M3_Out is on (XIC), then examine if M3_RunFB is off (XIO), then TON on M3_StartTimeout XIC M3_Out M3_Out M3_Out XIO M3_RunFB M3_RunFB M3_RunFB TON M3_StartTimeout T#4s 0 TONTimerM3_StartTimeoutM3_StartTimeoutPresetT#4sT#4sAccum00
Rung 14
Ladder logic rung: examine if M3_StartTimeout.DN is on (XIC), then examine if M3_RunFB is off (XIO), then examine if M3_Fault_OS is on (XIC), then latch output M3_FaultLatch (OTL) examine if M3_StartTimeout.DN is on (XIC), then examine if M3_RunFB is off (XIO), then examine if M3_Fault_OS is on (XIC), then latch output M3_FaultLatch (OTL) XIC M3_StartTimeout.DN M3_StartTimeout.DN M3_StartTimeout.DN XIO M3_RunFB M3_RunFB M3_RunFB OSR M3_Fault_OS M3_Fault_OS M3_Fault_OS OSR OTL M3_FaultLatch M3_FaultLatch M3_FaultLatch L
Rung 15
Ladder logic rung: examine if M3_FaultLatch is on (XIC), then examine if M3_FaultAck is on (XIC), then examine if M3_Out is off (XIO), then unlatch output M3_FaultLatch (OTU) examine if M3_FaultLatch is on (XIC), then examine if M3_FaultAck is on (XIC), then examine if M3_Out is off (XIO), then unlatch output M3_FaultLatch (OTU) XIC M3_FaultLatch M3_FaultLatch M3_FaultLatch XIC M3_FaultAck M3_FaultAck M3_FaultAck XIO M3_Out M3_Out M3_Out OTU M3_FaultLatch M3_FaultLatch M3_FaultLatch U
Rung 16
Ladder logic rung: examine if HMI_StopCmd is on (XIC), then unlatch output M3_Out (OTU) examine if HMI_StopCmd is on (XIC), then unlatch output M3_Out (OTU) XIC HMI_StopCmd HMI_StopCmd HMI_StopCmd OTU M3_Out M3_Out M3_Out U
Rung 17
Ladder logic rung: examine if HMI_StopCmd is on (XIC), then TON on M2_StopDelay examine if HMI_StopCmd is on (XIC), then TON on M2_StopDelay XIC HMI_StopCmd HMI_StopCmd HMI_StopCmd TON M2_StopDelay T#3s 0 TONTimerM2_StopDelayM2_StopDelayPresetT#3sT#3sAccum00
Rung 18
Ladder logic rung: examine if M2_StopDelay.DN is on (XIC), then unlatch output M2_Out (OTU) examine if M2_StopDelay.DN is on (XIC), then unlatch output M2_Out (OTU) XIC M2_StopDelay.DN M2_StopDelay.DN M2_StopDelay.DN OTU M2_Out M2_Out M2_Out U
Rung 19
Ladder logic rung: examine if M2_StopDelay.DN is on (XIC), then TON on M3_StopDelay examine if M2_StopDelay.DN is on (XIC), then TON on M3_StopDelay XIC M2_StopDelay.DN M2_StopDelay.DN M2_StopDelay.DN TON M3_StopDelay T#3s 0 TONTimerM3_StopDelayM3_StopDelayPresetT#3sT#3sAccum00
Rung 20
Ladder logic rung: examine if M3_StopDelay.DN is on (XIC), then unlatch output M1_Out (OTU) examine if M3_StopDelay.DN is on (XIC), then unlatch output M1_Out (OTU) XIC M3_StopDelay.DN M3_StopDelay.DN M3_StopDelay.DN OTU M1_Out M1_Out M1_Out U
Rung 21
Ladder logic rung: examine if Estop_Active is off (XIO), then unlatch output M1_Out (OTU), then either unlatch output M2_Out (OTU), then either unlatch output M3_Out (OTU) examine if Estop_Active is off (XIO), then unlatch output M1_Out (OTU), then either unlatch output M2_Out (OTU), then either unlatch output M3_Out (OTU) XIO Estop_Active Estop_Active Estop_Active OTU M1_Out M1_Out M1_Out U OTU M2_Out M2_Out M2_Out U OTU M3_Out M3_Out M3_Out U
energizedTip: click a contact in the diagram to flip its bit.
Full 3-motor timed start sequence. M1 starts immediately on Seq_Running. M2 starts 5 s after M1 run-confirm. M3 starts 5 s after M2 run-confirm. Each motor has a 4 s run-confirm timeout that latches a fault and halts the sequence. Stop command reverses order: M3 off first, M2 off after 3 s, M1 off after another 3 s. E-stop clears all outputs instantly.

How the Logic Actually Works

Walk through the start path first. When HMI_StartCmd pulses true with no faults active, Seq_Running latches on. The next rung immediately sets M1_Out. The timeout timer M1_StartTimeout starts ticking the moment M1_Out is on and M1_RunFB is still off. If the contactor closes within 4 seconds, M1_RunFB goes true, the timer rung goes false, and the timer stops without reaching DN. No fault. The delay timer M2_StartDelay then starts, gated by M1_Out AND M1_RunFB. After 5 seconds, M2_Out latches on and the same pattern repeats for motor 2, then motor 3.

The fault path is what separates a production program from a textbook example. If M1_RunFB never arrives and M1_StartTimeout.DN goes true, a one-shot (OSR) fires exactly once and latches M1_FaultLatch. That latch immediately breaks the Seq_Running enabling rung, so no further motors can start. The operator has to acknowledge the fault from the HMI (with the machine stopped) before the latch clears. This one-shot pattern is important: without it, the fault latch would continuously try to set and clear on every scan. The OSR and edge detection approach is worth reviewing if this is new to you.

Do not gate the fault timeout timer with Seq_Running. Gate it only with the motor output and the absence of run-confirm. If you gate it with Seq_Running, a stop command resets the timer before DN fires, masking the fault on short stop-start cycles. I saw this exact bug cause an undetected failing contactor on a flour mill conveyor. It ran for weeks dropping product before someone noticed.

The Reverse Stop Sequence

A clean stop matters as much as a clean start. When HMI_StopCmd fires, M3_Out is immediately unlatched (feed conveyor stops, no more material entering the line). M2_StopDelay starts timing. After 3 seconds, M2_Out unlatches. M3_StopDelay then starts, and after another 3 seconds M1_Out unlatches. The discharge conveyor runs last, clearing whatever is still on the belt. This is exactly the same principle used in the pump station exercise, just applied to a conveyor train instead of a wet well.

The E-stop path is separate and unconditional. A single rung with XIO(Estop_Active) fires three OTU instructions in one scan. No delay, no sequence. Safety hardware handles the physical disconnection; the PLC just mirrors that state in software immediately. For more on how the E-stop circuit itself is wired, see emergency stop circuit wiring categories.

Common Mistakes in Motor Sequence Logic

  • Using OTE instead of OTL/OTU for motor outputs: the output drops for one scan whenever a seal-in rung momentarily goes false, which can cause contactors to chatter.
  • Forgetting to reset the delay timers when the sequence stops: if you restart quickly, the delay timer still has its accumulated value and M2 or M3 may start instantly on the next run.
  • Setting run-confirm timeout too short: 4 seconds is fine for a direct-on-line motor under 5.5 kW, but a larger motor through a star-delta starter may need 8 to 12 seconds to fully confirm.
  • Not including any fault in the Seq_Running guard: if M2 faults and M1 is still running, you need to decide whether M1 should coast or stop. Feeding Seq_Running through all fault latches forces a deliberate choice.
  • Wiring a normally-closed auxiliary contact as the run-confirm: if the contact wires break, the PLC sees false run-confirm permanently, masking real faults. Use NO auxiliary contacts for run-confirm and let the timeout catch open-circuit failures.
Flat vector timing diagram showing the timed start and reverse stop sequence for three motors in a PLC motor sequence exercise
Start and stop timing for the 3-motor sequence. The discharge conveyor (M1) always starts first and stops last.

Extending the Exercise

Once the base sequence works, add these layers to make it production-grade:

  1. Add a CTU counter that counts successful start cycles. After 500 cycles, set a maintenance-due bit. See PLC counter instructions for the CTU setup.
  2. Add an HMI faceplate showing each motor's state: stopped, starting, running, faulted. The HMI tag linking guide shows how to map these bits correctly.
  3. Replace the fixed 5-second inter-motor delay with an HMI-adjustable DINT parameter loaded from a recipe. This is the same indexed recipe pattern used in the bottle filling project.
  4. Add a 'jog' mode that allows individual motor starts without the sequence, gated by a key switch input so operators cannot accidentally jog a motor mid-production.
  5. Test the fault path deliberately: with the program running in simulation (see how to simulate ladder logic without a PLC), force M2_RunFB to stay false and confirm the fault latches, M3 never starts, and the ack cycle works correctly.

Translating This to Siemens TIA Portal

The structure maps cleanly to S7-1200 or S7-1500. Replace OTL/OTU with Set/Reset coils (S and R). Replace Rockwell TON with the IEC TON function block from the standard library. Tag names follow the TIA Portal convention (e.g., M1_StartTimeout.Q instead of .DN). If you are new to TIA Portal timers, S7-1200 timers in TIA Portal covers the exact block interface. The fault latch OSR pattern works the same way using a P_TRIG coil instead of an OSR instruction. Store the fault bits in a Global DB for clean HMI access, as shown in the S7-1200 Global vs Instance DB guide.

If your motors are driven by VFDs rather than direct-on-line contactors, the run-confirm feedback usually comes from the drive's Run output bit over EtherNet/IP or PROFINET rather than a hardwired aux contact. The timeout logic is identical, but the feedback path is different. Check the drive's fault codes first if the run-confirm never arrives: VFD fault codes covers the most common culprits.

Troubleshooting the Sequence Online

Once the program is downloaded, use online monitoring to step through the sequence in real time. Watch the timer accumulated values climb and confirm each DN bit fires at the right moment. If M2_StartDelay never starts timing, check that M1_RunFB is actually going true: force the input in software (with the machine safe and isolated) and confirm the rung logic. The PLC troubleshooting with online monitoring guide has a systematic method for exactly this kind of step-by-step verification. If a physical input is suspect, how to test a PLC input with a multimeter will confirm whether the signal is reaching the module at all.


The motor start sequence is a core building block. From here, take on the PLC pump station exercise which adds duty/standby alternation and high-level interlocks to a similar timed structure. For a more complex sequential machine, the PLC bottle filling machine project introduces step-based state control that scales to larger systems. And if you want to sharpen your troubleshooting skills on sequences like this one, work through the PLC troubleshooting interview questions to see how faults in sequential logic are diagnosed under pressure.

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